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All publications for the rubric Electronics (wafers, semiconductors, microchips,...)

The TWINSCAN EXE:5000 High NA EUV scanner in the High NA Lab demonstrating the first-ever 10 nm dense lines obtained in a single exposure.
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  • Electronics (wafers, semiconductors, microchips,...)

Opening of the joint ASML-imec High NA EUV Lithography Lab marks a milestone in preparing High NA EUV lithography for accelerated adoption in mass manufacturing

ASML and imec open joint High NA EUV Lithography Lab offering an early development platform to the leading-edge semiconductor ecosystem

Imec, a world-leading research and innovation hub in nanoelectronics and digital technologies, and ASML Holding N.V. (ASML), a leading lithography supplier to the semiconductor industry, today announced the opening of the High NA EUV Lithography Lab in Veldhoven, the Netherlands, a lab jointly run b…
Abbildung 1 - SEM- Querschnittsaufnahme eines Die-to-Wafer hybrid gebondeten Versuchsträgers mit 2µm Bondpadabstand. / Figure 1 – Cross-section SEM image of a die-to-wafer hybrid bonded test vehicle with 2µm bond pad pitch. Abbildung 2 - A) Vision für ein optisch verbundenes Multi-XPU-Rechnersystem auf Waferebene; und B) demonstriertes Testsystem, das aus PIC-Dies mit eingebetteten SiN-Wellenleitern (WG) und evaneszenten Kopplern besteht, die mit einem unteren PIC-Wafer mit komplementären SiN-evaneszenten Kopplern verbunden sind. / Figure 2 – A) Vision for a wafer-level, optically interconnected multi-XPU compute system; and B) demonstrated test system comprising of PIC dies with embedded SiN waveguides (WG) and evanescent couplers bonded to a bottom PIC wafer with complementary SiN evanescent couplers.
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  • Electronics (wafers, semiconductors, microchips,...)

Improved die-to-wafer assembly flow opens doors to logic/memory-on-logic stacking, and to optically interconnected systems-on-wafer

Imec demonstrates die-to-wafer hybrid bonding with a Cu interconnect pad pitch of 2µm

This week, at the 2024 IEEE Electronic Components and Technology Conference (ECTC), imec, a world-leading research and innovation hub in nanoelectronics and digital technologies, presents a Cu-to-Cu and SiCN-to-SiCN die-to-wafer bonding process resulting in a Cu bond pad pitch of only 2µm at <35…
300-mm-Reinraum des Fraunhofer IPMS. © Fraunhofer IPMS / 300 mm cleanroom at the Fraunhofer IPMS. © Fraunhofer IPMS Luftbildaufnahme von Infineon Dresden. © Infineon Technologies AG / Aerial view of Infineon Dresden. © Infineon Technologies AG „Smart-Power-Technologien“ in Anwendungen für Endverbraucher. © Infineon Technologies AG /
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  • Electronics (wafers, semiconductors, microchips,...)

Intelligent energy management for the future

Fraunhofer IPMS supports the 300 mm process development of smart power technologies for the semiconductor manufacturer Infineon at the Dresden site

In a joint development project spanning around one year, important progress was made in the production of “Smart power technologies”. Fraunhofer IPMS provided significant support to the semiconductor manufacturer Infineon by supplying selected process modules within the entire CMOS process value…
5DOF Miniatur-XYZ-Phi-Delta Positioniersystem für die aktive Ausrichtung und Montage von Optiken. (Copyright: Steinmeyer Mechatronik)
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  • Electronics (wafers, semiconductors, microchips,...)

Hochpräzises Positioniersystem für die aktive Ausrichtung und Montage von Optiken

Innovativer 5-Achs-Aligner für die Halbleiterindustrie

Mit dem 5DOF Miniatur-XYZ-Phi-Delta Positioniersystem bietet Steinmeyer Mechatronik eine innovative Lösung für hochpräzise Ausrichtprozesse. Die Kombination aus Tripod und XY-Kreuztisch gewährleistet ein Höchstmaß an Präzision, Robustheit sowie Zuverlässigkeit und begeistert gleichzeitig mit…
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