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Graph: Etching at cryogenic temperature results in targeted k-value

New method allows IC manufacturers to reach scaling levels at 20nm and beyond, without compromising speed and device cross-talk

Imec reveals method of damage free cryogenic etching of ultralow-k dielectrics

Imec today announced a cryogenic etching method that protects the surface of porous ultralow-k dielectrics against excessive plasma induced damages.

As semiconductor technology scales below the 20nm node, the capacitance increases between nearby conductive portions of high-density integrated circuits…

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